자일링스의 AES 키 확장 모듈 : 오류 : 신호에 multisouce

Question

이 코드는 자일링스 9.2 ise VHDL로 작성된 코드입니다. NK = 4 NR = 10; VALUE = 43; K_IN가

type STATEX is array(0 to 3, 0 to 3) of std_logic_vector (7 downto 0); 

K_OUT 형태의 사용자로부터의 열쇠가

type KEYWORD is array (0 to 43) of std_logic_vector (31 downto 0); 

subword의 출력은 32 비트의 입력 SBOX 값을 반환하는 성분이다.

신호의 K_IN 및 K_OUT 다중 소스가 어디에서 발생하는지 알 수 없습니다. 이 문제를 해결하고 해결하도록 도와주세요. 고맙습니다.

LIBRARY IEEE; 
USE IEEE.STD_LOGIC_1164.ALL; 
USE IEEE.STD_LOGIC_ARITH.ALL; 
USE IEEE.STD_LOGIC_UNSIGNED.ALL; 
USE WORK.STATEVARIABLE.ALL; 

ENTITY KEY_MODULE IS 
    PORT ( 
     SYS_CLK: IN STD_LOGIC; 
     RST:  IN STD_LOGIC; 
     S:   IN STD_LOGIC; 
     K_IN:  IN STATEX; ---- FOR 128 BITS KEY 
     K_OUT:  OUT KEYWORD 
    ); 

END KEY_MODULE; 

ARCHITECTURE BEHAVIORAL OF KEY_MODULE IS 
    SIGNAL SWORD_OUT: STD_LOGIC_VECTOR(31 DOWNTO 0); 
    SIGNAL TEMP:  STD_LOGIC_VECTOR(31 DOWNTO 0); 
    SIGNAL TEMP_WORD: KEYWORD; 

    COMPONENT SUBWORD 
     PORT (
      SYS_CLK: IN STD_LOGIC; 
      RST:  IN STD_LOGIC; 
      S:   IN STD_LOGIC; 
      WORD:  IN STD_LOGIC_VECTOR(31 DOWNTO 0); 
      SWORD:  OUT STD_LOGIC_VECTOR(31 DOWNTO 0) 
     ); 
    END COMPONENT; 

    FUNCTION ROTWORD (A: STD_LOGIC_VECTOR(31 DOWNTO 0)) 
      RETURN STD_LOGIC_VECTOR IS 
     VARIABLE OUTPUT: STD_LOGIC_VECTOR(31 DOWNTO 0); 
    BEGIN 
     OUTPUT := A(23 DOWNTO 16) & A(15 DOWNTO 8) & A(7 DOWNTO 0)& 
        A(31 DOWNTO 24); 
     RETURN OUTPUT; 
    END FUNCTION; 

    FUNCTION RCON (I: INTEGER) RETURN STD_LOGIC_VECTOR IS 
     VARIABLE OUTPUT: STD_LOGIC_VECTOR(31 DOWNTO 0); 
     VARIABLE TEMP1: STD_LOGIC_VECTOR(7 DOWNTO 0); 
     VARIABLE NUM: INTEGER; 
    BEGIN 
     NUM := 2**(I-1) REM 229 ; 
     TEMP1 := CONV_STD_LOGIC_VECTOR(NUM,8); 
     OUTPUT := TEMP1 & X"000000" ; 
     RETURN OUTPUT; 
    END FUNCTION; 

BEGIN 

G1: FOR J IN 0 TO NK-1 GENERATE 
     TEMP_WORD(J) <= K_IN(0,J) & K_IN(1,J) & K_IN(2,J) & K_IN(3,J); 
    END GENERATE G1; 

G2: FOR J IN NK TO VALUE GENERATE 
     TEMP <= TEMP_WORD(J-1); 
G3:  IF J MOD NK = 0 GENERATE 
UUT1 :  SUBWORD 
       PORT MAP (
        SYS_CLK => SYS_CLK, 
        RST => RST, 
        S => S, 
        WORD => ROTWORD(TEMP), 
        SWORD => SWORD_OUT 
       ); 
      TEMP <= SWORD_OUT XOR RCON(J/NK); 
     END GENERATE G3; 

G4:  IF (NK > 6 AND (J MOD NK) = 4) GENERATE 
UUT2 :  SUBWORD 
       PORT MAP (
        SYS_CLK => SYS_CLK, 
        RST => RST, 
        S => S, 
        WORD => TEMP, 
        SWORD => SWORD_OUT 
       ); 
      TEMP <= SWORD_OUT; 
     END GENERATE G4; 
     TEMP_WORD(J) <= TEMP_WORD(J-NK) XOR TEMP; 
    END GENERATE G2; 

    K_OUT <= TEMP_WORD; 

END BEHAVIORAL; 

출력 오차 : I가 하나 개의 프로세스에서 (K_OUT이다) TEMP_WORD에 모든 assignations 캡슐화 또는 블록 생성 할 것이다

ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><31>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><30>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><29>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><28>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><27>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><26>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><25>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_OUT<10><24>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><7>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><6>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><5>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><4>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><3>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><2>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><1>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><1><0>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><7>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><6>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><5>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><4>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><3>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><2>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><1>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><2><0>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><7>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><6>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><5>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><4>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><3>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><2>>
ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><1>> ERROR:Xst:528 - Multi-source in Unit <KEY_MODULE> on signal <K_IN<3><3><0>>

Answer 1

(예 : Gmain 아래 G1과 G2)를. 인덱스가 겹쳐 보이지는 않지만 컴파일러는 여전히이를 허용하지 않을 수 있습니다.

편집 :

더 밀접하게 코드를 읽고, 문제는 다음 TEMP_WORD에 할당 된 TEMP 신호의 여러 assignations에서 온다 -> K_OUT

Moreever, 당신은 TEMP이 < = TEMP_WORD (J-1); 및 TEMP_WORD (J) < = TEMP_WORD (J-NK) XOR TEMP; G2의 시작과 끝 : 조합 루프를 만듭니다.